Día: jueves 7 de noviembre de 2019
Hora: 11:30
Lugar: Sala de Grados B - E.T.S. Ingeniería de Telecomunicación

Abstract:

Digital baseband processing is an enabler to counter the adverse channel effects such as noise, fading and multipath. Channel coding, Bit Interleaved Coded Modulation (BICM), higher order constellation mapping and front end waveform (such as OFDM) are key concepts used to achieve high data rate while maintaining reliability of communication. Efficient hardware implementation of baseband processing algorithms, while considering flexibility, throughput and low area overhead constraints, is another key aspect towards maturing the research into tangible products. Moreover, to meet time to market constraints there is a need to adopt high abstraction level tools to reduce the hardware development and verification time. In this presentation first of all main baseband processing modules in modern communication systems will be introduced along with algorithms associated with these modules. The flexibility parameters associated with these modules will also be discussed. In second part of the presentation hardware aspects for these modules will be presented and in last part Application Specific Instruction Set Processor (ASIP) based rapid prototyping flow to make flexible hardware of baseband processing modules will be presented.