Conferencia de Ángel Rodríguez Vázquez (IMSE-CNM-CSIC y US): Chip Architectures for Efficient Analog-to-Information Image Analysis using Out-the-Box Processing Concepts
- Conferenciante: Ángel Rodríguez Vázquez (IMSE-CNM-CSIC y US)
- Conferencia: Chip Architectures for Efficient Analog-to-Information Image Analysis using Out-the-Box Processing Concepts.
- Fecha y hora: Jueves 19 octubre 17:00.
- Lugar: Salón de Grados B, EII
- Organiza: Fernando Vidal Verdú , Línea "Smart Electrical and Electronic Systems. Sistemas Eléctricos y Electrónicos Inteligentes".
Resumen
"Citius, altius, fortius, the Olympic motto, applies to the evolution of imagers fueled by CIS processes, and convergent packaging and heterogeneous integration technologies. Besides, embedding image analysis and, eventually, vision task capabilities everywhere defines one prevalent challenge of micro-system integration. However, conventional processing paradigms based on full image digitization and von Neumann processing architectures may not address this challenge adequately. Indeed, natural retinas, the most efficient imaging front-ends known to date, achieve outstanding energy efficiencies and data throughputs using different paradigms. Although retina behavior might not be exactly reproduced with micro-electronic technologies, the concepts and principles underlying its operation inspire “out-the-box” vision system chip architectures that handle images according to the Olympic motto. This talk overviews some most prominent concepts of ....
- Conferenciante: Ángel Rodríguez Vázquez (IMSE-CNM-CSIC y US)
- Conferencia: Chip Architectures for Efficient Analog-to-Information Image Analysis using Out-the-Box Processing Concepts.
- Fecha y hora: Jueves 19 octubre 17:00.
- Lugar: Salón de Grados B, EII
- Organiza: Fernando Vidal Verdú , Línea "Smart Electrical and Electronic Systems. Sistemas Eléctricos y Electrónicos Inteligentes".
Resumen
"Citius, altius, fortius, the Olympic motto, applies to the evolution of imagers fueled by CIS processes, and convergent packaging and heterogeneous integration technologies. Besides, embedding image analysis and, eventually, vision task capabilities everywhere defines one prevalent challenge of micro-system integration. However, conventional processing paradigms based on full image digitization and von Neumann processing architectures may not address this challenge adequately. Indeed, natural retinas, the most efficient imaging front-ends known to date, achieve outstanding energy efficiencies and data throughputs using different paradigms. Although retina behavior might not be exactly reproduced with micro-electronic technologies, the concepts and principles underlying its operation inspire “out-the-box” vision system chip architectures that handle images according to the Olympic motto. This talk overviews some most prominent concepts of a technology that is already starting to transition from academia to industrial usage."
CV resumido del conferenciante:
Ángel Rodríguez-Vázquez (IEEE Fellow, 1999) received the Ph.D. degree in Physics-Electronics (Universidad de Sevilla, 1982). After stays at the University of California-Berkeley and Texas A&M University, he became a Full Professor of Electronics (U. Sevilla) in 1995. He co-founded the Instituto de Microelectrónica de Sevilla, a joint undertaken of Consejo Superior de Investigaciones Científicas (CSIC) and Universidad de Sevilla, and started a Research Lab on Analog and Mixed-Signal Circuits for Sensors and Communications. He has always been looking for a balance between long-term research and industrial innovation. In 2001, he co-founded AnaFocus Ltd. and served as CEO until June 2009, when the company reached maturity as a worldwide provider of smart CMOS imagers. The company was acquired by E2V in 2014 and is currently part of Teledyne Technologies. He participated in the launching of AnaLogic Ltd, and Photonvis Ltd. He has eleven patents filed; AnaFocus and Photonvis started on patents co-authored by him on vision chip architectures and SPAD sensors, respectively. His research embraces smart imagers, vision chips, and biomedical circuits, always emphasizing system integration. His Lab designed several high-performance mixed-signal ICs in the framework of Spanish, European, and USA R&D programs. These included three generations of vision chips, analog front-ends for XDSL MoDems, ADCs for wireless communications, ADCs for automotive sensors, chaotic signals generators, complete MoDems for power-line communications, etc. Most of these chips were state-of-the-art in their respective fields, and some entered in massive production. He also produced teaching materials on data converters that were delivered to companies and got the Quality Label of EuroPractice. His publications have ~12,000 citations and several best paper awards: the IEEE Guillemin-Cauer Award, two Wiley’s IJCTA Awards, two IEEE ECCTD Awards, one IEEE-ISCAS Award, one SPIE-IST Electronic Imaging Award, the IEEE ISCAS Best Demo Award, and the IEEE ICECS Best Demo Award. He has an h-index of 51 and an i10-index of 237 (Google Scholar). He is a member of Academia Europaea and got the 2019 Mac Van Valkenburg award of IEEE-CASS for outstanding technical achievements. He has served and his serving as Editor and member of the Editorial Board for IEEE and non-IEEE journals. He chaired several international IEEE (NDES 1996, CNNA 1996, ECCTD 2007, ESSCIRC 2010, ICECS 2013 and ISCAS 2020) and SPIE conferences. He served as VP Region 8 of IEEE CASS (2009-2012) and Chair of the IEEE CASS Fellow Evaluation Committee (2010, 2012, 2013, 2014, and 2015).
